library verilog;
use verilog.vl_types.all;
entity taxi is
    port(
        sys_clk         : in     vl_logic;
        rst_cus         : in     vl_logic;
        rst_rid         : in     vl_logic;
        LEDrun          : out    vl_logic;
        LEDwait         : out    vl_logic;
        point           : out    vl_logic;
        screen_led1     : out    vl_logic_vector(7 downto 0);
        screen_led2     : out    vl_logic_vector(7 downto 0);
        screen_led3     : out    vl_logic_vector(7 downto 0);
        screen_led4     : out    vl_logic_vector(7 downto 0);
        num1            : out    vl_logic_vector(3 downto 0);
        num2            : out    vl_logic_vector(3 downto 0);
        num3            : out    vl_logic_vector(3 downto 0);
        nump            : out    vl_logic_vector(3 downto 0);
        numz            : out    vl_logic_vector(3 downto 0)
    );
end taxi;
